High-speed PCB Design – 4 Things That are Very Helpful to You

Understanding the Basics of High-speed PCB Design

Before delving into the specific techniques, it’s essential to understand the fundamentals of high-speed PCB design. High-speed signals are typically defined as those with rise times less than 1 nanosecond or frequencies above 100 MHz. At these speeds, the behavior of the signals becomes more complex, and designers must consider factors such as impedance matching, signal integrity, and electromagnetic interference (EMI).

Key Concepts in High-speed PCB Design

1. Impedance Matching: Ensuring that the impedance of the signal path matches the impedance of the source and load to minimize reflections and signal distortion.

2. Signal Integrity: Maintaining the quality and accuracy of the signal as it travels through the PCB, minimizing crosstalk, noise, and other disturbances.

3. Electromagnetic Interference (EMI): Reducing the electromagnetic emissions from the PCB to prevent interference with other devices and complying with regulatory standards.

4. Transmission Line Effects: Understanding how signals behave as they travel through the PCB traces, which act as transmission lines at high frequencies.

1. Proper Layer Stack-up Design

The layer stack-up of a PCB refers to the arrangement of the conductive layers and insulating materials that make up the board. Proper layer stack-up design is crucial for high-speed PCBs, as it directly affects signal integrity, impedance control, and EMI performance.

Guidelines for High-speed Layer Stack-up Design

1. Use a symmetrical stack-up with equal numbers of layers on either side of the core to minimize warping and improve manufacturability.

2. Separate power and ground planes to provide a low-impedance return path for high-speed signals and reduce EMI.

3. Use thin dielectric materials between layers to minimize the distance between the signal trace and its reference plane, reducing loop area and EMI.

4. Consider using a hybrid stack-up with a mix of high-speed and low-speed layers to optimize signal integrity and cost.

Example Layer Stack-up for a 6-layer High-speed PCB

2. Controlled Impedance Routing

Controlled impedance routing is the practice of designing PCB traces with specific geometries and materials to achieve a target impedance value. This is essential for high-speed signals, as impedance mismatches can lead to reflections, signal distortion, and EMI.

Factors Affecting Trace Impedance

1. Trace width and thickness
2. Dielectric material properties (dielectric constant and loss tangent)
3. Distance between the trace and its reference plane
4. Presence of nearby traces or components

Common Controlled Impedance Structures

1. Microstrip: A trace on the outer layer of the PCB, with a reference plane on the layer beneath it. Microstrip traces are easy to route but more susceptible to EMI.

2. Stripline: A trace embedded between two reference planes, typically in the inner layers of the PCB. Stripline traces have better EMI performance but are more challenging to route.

3. Coplanar Waveguide: A trace on the outer layer of the PCB, with ground planes on either side of the trace. Coplanar waveguides offer a compromise between microstrip and stripline in terms of EMI performance and routing complexity.

Calculating Trace Impedance

To calculate the impedance of a PCB trace, designers can use various formulas or simulation tools. One common formula for the characteristic impedance of a microstrip trace is:

Z₀ = 87 / √(εᵣ + 1.41) × ln(5.98h / (0.8w + t))

Where:
– Z₀ is the characteristic impedance (Ω)
– εᵣ is the dielectric constant of the substrate material
– h is the distance between the trace and the reference plane (mm)
– w is the width of the trace (mm)
– t is the thickness of the trace (mm)

3. Signal Integrity Analysis and Simulation

Signal integrity analysis and simulation are essential tools for high-speed PCB designers to predict and optimize the performance of their designs before fabrication. By simulating the behavior of the signals in the PCB, designers can identify potential issues and make necessary adjustments to ensure optimal signal quality.

Common Signal Integrity Analysis Techniques

1. Time-domain Reflectometry (TDR): A technique that sends a high-frequency pulse through the PCB and analyzes the reflections to determine the impedance profile and locate discontinuities.

2. Frequency-domain Analysis: A method that evaluates the frequency response of the PCB, including parameters such as insertion loss, return loss, and crosstalk.

3. Eye Diagram Analysis: A graphical representation of the quality of a digital signal, showing the effects of noise, jitter, and other distortions on the signal’s timing and voltage levels.

Signal Integrity Simulation Tools

There are several commercial and open-source tools available for signal integrity simulation, including:

1. Ansys SIwave
2. Cadence Sigrity
3. Mentor Graphics HyperLynx
4. Altium Designer
5. KiCad (open-source)

These tools allow designers to model the PCB Stack-up, define signal nets and constraints, and perform various types of analysis to optimize the design for signal integrity.

4. EMI Mitigation Techniques

Electromagnetic interference (EMI) is a major concern in high-speed PCB design, as it can cause both intra-system and inter-system disturbances. To mitigate EMI, designers must employ various techniques to minimize the generation and coupling of electromagnetic energy.

EMI Mitigation Strategies

1. Proper Grounding: Use a solid ground plane and multiple vias to provide a low-impedance return path for high-speed signals, minimizing the loop area and reducing EMI.

2. Decoupling Capacitors: Place decoupling capacitors close to the power pins of ICs to provide a local source of charge and minimize the power supply noise.

3. Signal Routing: Route high-speed signals away from sensitive analog circuits and other potential sources of interference. Use differential routing for critical signals to cancel out common-mode noise.

4. Shielding: Use shielding materials, such as metal enclosures or conductive gaskets, to contain electromagnetic emissions and prevent external interference.

5. Spread-spectrum Clocking: Employ spread-spectrum clock generation techniques to spread the energy of high-frequency clock signals over a wider bandwidth, reducing peak EMI levels.

EMI Simulation and Analysis

In addition to signal integrity simulation, designers can also use electromagnetic field solvers to simulate the EMI performance of their PCBs. These tools can help identify potential sources of EMI and evaluate the effectiveness of mitigation strategies.

Some popular EMI simulation tools include:

1. Ansys HFSS
2. CST Studio Suite
3. Keysight EMPro
4. Altair Feko

By incorporating EMI simulation and analysis into the design process, high-speed PCB designers can ensure that their boards meet both functional and regulatory requirements.

Frequently Asked Questions (FAQ)

1. Q: What is the difference between microstrip and stripline routing?
   A: Microstrip routing refers to traces on the outer layers of the PCB, with a single reference plane beneath them. Stripline routing, on the other hand, involves traces embedded between two reference planes in the inner layers of the PCB. Microstrip routing is easier to implement but more susceptible to EMI, while stripline routing offers better EMI performance but is more challenging to route.

2. Q: Why is impedance matching important in high-speed PCB design?
   A: Impedance matching is crucial in high-speed PCB design because it minimizes signal reflections and distortions that can occur when there is a mismatch between the impedance of the signal path and the impedance of the source or load. By ensuring proper impedance matching, designers can maintain signal integrity and reduce EMI.

3. Q: What are some common signal integrity issues in high-speed PCBs?
   A: Some common signal integrity issues in high-speed PCBs include reflections due to impedance mismatches, crosstalk between adjacent traces, noise from power supply fluctuations, and jitter in clock signals. These issues can lead to data errors, reduced performance, and EMI problems.

4. Q: How can I reduce EMI in my high-speed PCB design?
   A: There are several techniques to reduce EMI in high-speed PCB design, including proper grounding, the use of decoupling capacitors, careful signal routing, shielding, and spread-spectrum clocking. By employing these strategies and performing EMI simulations, designers can minimize electromagnetic emissions and ensure compliance with regulatory standards.

5. Q: What are some best practices for controlled impedance routing?
   A: Some best practices for controlled impedance routing include using a consistent dielectric material throughout the PCB, maintaining a uniform trace width and spacing, minimizing the distance between the trace and its reference plane, and avoiding abrupt changes in trace geometry. Designers should also perform impedance calculations and simulations to verify that the traces meet the target impedance value.

In conclusion, high-speed PCB design requires careful consideration of various factors, including layer stack-up design, controlled impedance routing, signal integrity analysis, and EMI mitigation. By understanding the fundamentals of high-speed signals and employing the techniques and tools discussed in this article, designers can create robust and reliable PCBs that meet the demanding requirements of modern electronics.